Experienced designers of 10 Gbits/sec (10G) Ethernet, SONET/OTN, Infiniband (QDR/FDR), and Fibre channel (16/8GFC) products are well aware that the maintenance of signal quality is far more difficult ...

The future of design is here, and artificial intelligence (AI) is rapidly becoming a powerful ally in the world of signal integrity. AI isn’t just about doing more with less; it’s about doing things ...

One of the big challenges with 112G SerDes (and, to a lesser extent, all SerDes) is handling signal integrity issues. In the worst case of a long-reach application, the signal starts at the ...

A line of interconnect solutions for panel, I/O, and board-to-board applications—as well as design resources—address signal-integrity issues. Board-to-board solutions include single-ended and ...

Maintaining the quality and reliability of electrical signals as they travel through interconnects is proving to be much more challenging with chiplets and advanced packaging than in monolithic SoCs ...

Chip assembly and test house CS2 has set up a signal integrity lab especially for high frequency designs, such as those running above 1GHz. The firm, based in Belgium, will examine signal integrity ...

Are you designing a board with high-speed chipsets on either end of the link? You own the interconnect—and the risk. As clock and data rates climb, maintaining signal integrity becomes critical for ...

The “Era of AI” is here, transforming how we work and live, but it’s pushing data centers to their limits. Training large language models (LLMs) demands massive volumes of computing and memory, ...